When processors share a common memory area, coordination of memory access between the processors is necessary. Coordination of memory access insures that data written in the shared memory area are not prematurely overwritten by one processor before being read by another processor. Coordination of memory access also insures that two processors will not simultaneously attempt to access the shared memory area. Without coordination of memory access, systems sharing a common memory area may experience data loss or more seriously, hardware failure.
One approach to coordinating memory access is the use of a master processor. A master processor manages the activities of slave processors on shared memory. A master processor keeps track of the different areas in memory which are accessed and the purpose for which they are used. Each slave processor seeking access to the shared memory must first receive permission from the master processor. Typically, the master processor arbitrates memory access between slave processors by taking into account the priority of the tasks to be performed and whether the memory is currently being accessed by another processor.
Another approach for coordinating memory access is self-arbitration of processors through the use of an out-of-band transmission path. Typically, a separate bus which is not a memory-access bus is used to transmit state information from one processor to another sharing the common memory area. This allows the processors to coordinate memory access among themselves. For example, after a first processor is finished writing data to a location in the shared memory, the first processor can give access to that location of shared memory to a second processor to read that information by signaling the second processor through the out-of-band transmission path. Only the second processor can access the shared memory at that time for that specific purpose.
The use of a master processor has several drawbacks. Typically, processors require a large amount of power to operate. This is a problem for computer systems operating under tight power constraints, such as systems operating with batteries. Processors are also relatively large in size compared to other IC components. Thus, depending upon the environment of the computer system, the availability of physical space may not permit the implementation of an additional processor. Perhaps most importantly, the use of an additional processor for the purpose of memory arbitration adds an undesirable cost to the overall computer system.
Self-arbitration also has its limitations. Computer systems wishing to implement self-arbitration must provide an out-of-band transmission path to allow the processors sharing the memory space to communicate with each other. Design specifications of some computer systems may not permit the implementation of an out-of-band transmission path.
Thus, a method and apparatus for arbitrating access to a shared memory which does not require the implementation of an additional processor or an out-of-band transmission path is needed.